Non-volatile memory remapping (NVM-r) typically supports the remapping of up to three peripheral component interconnect express (PCIe) data storage devices, such as solid state devices. If message signaled interrupts, such as in MSI-X, are supported by the data storage devices, the MSI-X table and pending bit array (PBA) structures of an advanced host controller interface (AHCI) controller (e.g., a serial advanced technology attachment (SATA) controller) connected to the data storage devices, and the MSI-X tables and pending bit array structures of the data storage devices themselves are presented to software executed by a compute device as a single “main” MSI-X table and a single “main” PBA. An MSI-X table is typically embodied as a set of entries, each referred to as a vector, indicative of a structure of a message that may be sent to the device, causing an interrupt. Each bit in the PBA is typically indicative of whether the message at the corresponding position in the MSI-X table is pending (e.g., will be sent to the corresponding device to cause an interrupt).